The present disclosure generally relates to a semiconductor device, and more particularly, to nanowire field effect transistor (FET) devices.
The use of non-planar semiconductor devices such as, for example, Fin FET devices (i.e., FinFETs) is desirable due the ability to reduce the overall size of the semiconductor device. The fabrication of non-planar semiconductor devices such as, for example, wire-last gate-all-around FinFET devices, typically utilizes a semiconductor-on-insulator (SOI) substrate to reduce parasitic device capacitance. SOI substrates typically include a bulk substrate, a buried insulator layer located atop the bulk substrate, and a semiconductor-on-insulator (SOI) layer located atop the buried insulator layer. However, the cost associated with SOI substrates and the minimum thickness requirements due to the buried insulator layer has motivated efforts to reconsider forming non-planar semiconductor devices on a bulk semiconductor substrate.